**Q1. Answer the following questions: multiple type or dash fill up type**

a) The thermal runway in a CE transistor amplifier can be prevented by biasing a transistor in such a manner that

a) [katex] V_{CE} > V_{CC/2}[/katex] b) [katex]V_{CE} < V_{CC/2}[/katex] c) [katex]V_{CE} = V_{cc/2}[/katex] d) [katex]V_{CE} = 0[/katex]

**Ans:**

b) A diode is said to be useful to be configured as an amplifier when its **β** is

a) less than 0 b) between 0 & 1

c) between 1 & 50 d) > 50

c) A full wave rectifier needs at least ………………… diodes.

d) The maximum efficiency of an half wave rectifier is …………………..%.

e) The frequency compensation is used in Op-Amps to increase its ………………

f) An instrumentation amplifier uses ………………. Op-Amps.

g) Which of the following is not associated with a p-n juntion

a) junction capacitance

b) charge storage capacitance

c) depletion capacitance

d) channel length modulation

h) 9’s complement of 68 is …………………..

The decimal equivalent of 10010111 is……………….

i) What is mean by PIV rating of a diode

a) Maximum reverse bias potential which can be applied across a diode without breakdown

b) Maximum forward bias potential which can be applied across a diode without breakdown

c) Minimum potential required by a diode to reach conduction state

d) Maximum power allowable to a diode

j) SR Flip can be converted to T-type flip-flop if …………………..

**Q2 Answer the following question: Short answer type **

a) Define CMRR and Slew rate.

b) Difference between zener breakdown and avalanche breakdown.

c) Derive the relation between **α** and **β**

d) Prove Demorgan’s Theorem.

e) Draw the IEEE logic symbol of AND, NOT, NOR & XOR gates.

f) Define Bark Hausen criterion.

g) Give the relationship between Ico & Iceo.

h) Define the thermal runaway of transistor.

i) What is common collector configuration of BJT ?

j)

What is input impedance of op-amp circuit in the above figure?

Q3 a) With neat circuit diagram and waveforms, explain the working of a full wave bridge rectifier. Also discuss the PIV for center tapped Transformer.

Discuss the above circuit with sinusoidal input of peek to peek voltage 10V, Vrt = 2V , Vrz = 1V , R= 1 **Ω**, and the diode are silicon diode.

Q4 a) The i/p to the Full wave rectifier is v(t) = 200 sin50t. If RL is 1k**Ω** and

forward resistance of diode is 50**Ω**, find:

D.C current through the circuit

The A.C (rms) value of current through the circuit

The D.C output voltage

The A.C power input

The D.C power output

Rectifier efficiency.

b) Explain zener diode voltage regulator circuit with no load and with load.

Q5 a) With a neat circuit diagram,explain the Voltage Divider Bias circuit

using approximate analysis. Also derive the equation of stability (S)

for voltage Divider Bias circuit.

b) What is a DC load line? Explain Base biased method with necessary

equations.

Q6 a) Design a single satge common source amplifier for following

specification. Av =25, Vo = 2.5V

b) Derive the expression of 3 input summing amplifier.

Q7 a) Convert (1101101)2 =( )10 and (69)10= ( )2

Convert (1010111011110101)2= ( )16 and (FA876)16 = ( )2

b) Writes notes on Universal Gates. Also realize NOR using NAND

gates only.

Q8 a) Factorises the following Boolean equations

Y1=AB’+AB

Y2= (B+CA) + (C+A’B)

Write a note on Full Adder.

b) What is a RS flip-flop? Explain using its circuit diagram ,logic

symbol and truth table.

Q9 a) Write the principle and working of CRO with proper block diagram.

b) Write notes on

Virtual ground

Clamper circuit